AArch64
Registers
- ABI
-
Overview of ARM64 ABI conventions
- Integer Registers:
- 32 64 bits: X0~X31
- 32 32 bits: W0~W31
- Float Point and Vector Registers(Neon):
- 32 8 bits: B0~B31
- 32 16 bits: H0~H31
- 32 32 bits: S0~S31
- 32 64 bits: D0~D31
- 32 128 bits: Q0~Q31
- SVE Registers
- 32 VL bits(128~2048 bits) data register: Z0~Z31
- 16 VL/8 bits mask register: P0~P15
- FFR(1 First Faulting Register)